Logic Analyzer Trigger Options
Triggering is one of the most important features of a logic analyzer. It allows capturing signals at very precise instants. With a powerful trigger system, a logic analyzer can capture signals of interest that only occur very rarely or that are hard to spot in between other signals.
ScanaStudio offers many possibilities that can be accessed in the Trigger panel as shown below:
Trigger capabilities of each device
Depending on the logic analyzer device connected, you may see some differences. For instance, the trigger capabilities of each device are different and can be seen by clicking on the trigger engine name as shown in the image below
Some analyzers have only 1 engine, others have more than one engine (Trigger A and Trigger B). Having more than one trigger engine allows you to set up cascaded trigger events, or implement combinational triggering. For example, let’s imagine Trigger A is defined as: “10 ms pulse on channel 1”, and trigger B is defined as “Falling edge on channel 2”, then it’s possible to configure a combination logic trigger sequence like “Trigger A then Trigger B”, in which case the 10ms pulse on channel would have to occur before the falling edge on channel 2 for the capture to start.
Below are the different available options when it comes to triggering sequence order.
Some devices (especially high-end devices like SP1000G series Logic Analyzer) offer the possibility to output a trigger pulse when a trigger condition occurs. This can be useful to synchronize the logic analyzer device with other laboratory instruments (like an oscilloscope).
Trigger output is always enabled. The menu below allows you to define the trigger polarity.
Depending on the signals being captured, the signals of interest may happen before, during or after the trigger. One very important feature of Ikalogic Logic Analyzers is the ability to define with high flexibility the position of the trigger.
For instance, a trigger position defined to 75%, will have 75% pre-trigger samples, and only 25% post-trigger samples, allowing you to focus more on the logic signals and events that occurred before the trigger.
Please note that depending on the situation and internal memory limitation, there may be cases where the pre-trigger trigger depth requirement cannot be met. In that case, the logic analyzer device will try to provide as many pre-trigger samples as possible.
Flexitrig: Ikalogic’s trigger engine
In this section, we’ll cover the details of the trigger engine, called Flexitrig. Flexitrig is a proprietary triggering system allowing complex trigger patterns to be described to the logic analyzer device. On top of the standard trigger options you expect to find in a logic analyzer (like edge or level triggering), Flexitrig allows highly sophisticated trigger sequences to be described like a UART frame, and SPI packet or I2C transaction. Please note that the Flexitrig engine does not have an understanding of the different protocols being used, which means that virtually any protocol can be supported with a custom trigger sequence, and can be installed via future updates of ScanaSutdio scripts. (You can read more about Flexitrig and scripting in this section, although no scripting skills are required to use existing script features).
The different trigger options are listed below:
- No trigger.
- Edge Trigger.
- Logic change
- Pulse Trigger.
- Sequence Trigger.
- External Trigger.
- Protocol-based trigger.
“No trigger” simply means that capture will start as soon as possible after you hit the start button. Please note that there may be a few seconds of delay between the instant you hit the start button and when the capture actually starts.
Edge, logic change and pulse triggers are the most basic trigger options. Below we will describe in detail the more sophisticated trigger options
The Sequence trigger consists of several steps that may be separated by time constraints. A step is defined as a state for one or more channels. Undefined channels are simply ignored. A state can either be on the following:
- High level
- Low level
- Riding edge
- Falling edge
Please note that there may only be one edge event in a step. trying to add two edge events (e.g. two rising edges) on the same trigger step will result in an invalid configuration.
To configure the state for each channel in a given step, simply click on the state placeholder (as shown in the image below) to cycle through all possible states.
To add a new trigger step, click on the “+” sign at the right-most side.
A time constraint can be inserted in between two steps having an edge event, by clicking on the menu hover-icon below a step and selecting “Add time constraint before” or “Add time constraint after”.
As described before, the protocol-based trigger (e.g. trigger on a particular I2C packet) is implemented by the protocol decoder script and, by definition, is different for every protocol. To use such a trigger capability, first, you need to add a protocol decoder to your workspace (like UART, I2C or SPI). Once you add one or more of these protocol decoders and provided that they provide Trigger support, they will appear in the list of possible trigger options.
By definition, every protocol has a completely different trigger option, and consequently a different configuration user interface. As an example, below is the user interface to configure the UART trigger.
In this chapter, we have covered all the main features related to the trigger system used in Ikalogic Logic Analyzer devices. As presented, Ikalogic Logic Analyzers offer sophisticated trigger options, allowing the user to target very specific or rare events for in-depth analysis.