SP1000G Series
Logic Analyzer & Pattern Generator — up to 54 channels at 1 GSPS
Capture, decode, and generate digital signals with nanosecond precision. One instrument for protocol analysis, DFT validation, and automated test.
18 / 36 / 54
Bidirectional Channels
Each channel captures and generates — independently, simultaneously.
1 GSPS
On Every Channel
Full speed sustained across all channels. No trade-offs, no multiplexing.
8 ns
Pattern Gen Resolution
Generate precisely-timed digital patterns — protocol frames, test vectors, or custom sequences.
Capture & Decode
Trigger on complex conditions, capture deep traces with real-time compression (up to 12 Gb internal memory), and decode SPI, I²C, UART, CAN, parallel buses, and 60+ protocols out of the box.
Adjustable logic thresholds from 0.9 V to 5.0 V. Active probes with 10 kΩ / 5 pF input impedance.
Generate & Inject
Generate test vectors, protocol frames, or arbitrary digital sequences at 8 ns resolution. Each channel has a dedicated generation engine — capture and inject run in parallel, not time-shared.
Ideal for DFT workflows: inject scripted patterns into your DUT while monitoring its response on adjacent channels.
Script & Automate
Write custom protocol decoders and signal generators in JavaScript via ScanaStudio. Or drive the SP1000G from your own program with the ScanaStudio SDK, available for Python, NodeJS, Rust and C.
Trigger I/O, external clock input, and multi-unit chaining let you synchronize with any bench setup — down to the nanosecond.
Choose Your Channel Count
SP1018G
- 18 bidirectional channels
- 1 GSPS sampling & generation
- 4 Gb internal memory
- USB 3.0
SP1036G
- 36 bidirectional channels
- 1 GSPS sampling & generation
- 8 Gb internal memory
- USB 3.0
SP1054G
- 54 bidirectional channels
- 1 GSPS sampling & generation
- 12 Gb internal memory
- USB 3.0
Built For
- Semiconductor DFT — inject test vectors, capture DUT responses
- ASIC & FPGA validation — verify timing, protocol compliance, functional behavior
- Embedded systems debug — decode SPI, I²C, UART, CAN, and custom buses
- Production test — automate go/no-go checks via API
- Memory bus validation — parallel SRAM, Flash interface testing
- Protocol stress testing — generate edge-case sequences to break things on purpose
Trusted by engineering teams worldwide
From semiconductor labs to embedded development benches
Frequently Asked Questions
Can SP1000G capture and generate signals at the same time?
Yes. Capture and generation engines are independent — each with dedicated memory and control logic. Inject test patterns on some channels while monitoring DUT responses on others, in parallel, with full 1 GSPS resolution.
What protocols are supported?
60+ built-in decoders: SPI, I²C, UART, CAN, CAN-FD, LIN, 1-Wire, JTAG, SDIO, parallel buses, and more. You can also write your own decoders in JavaScript. See the full protocol list.
Can I automate SP1000G from my own software?
Yes. The ScanaStudio SDK (Python, NodeJS, Rust, C) configures channels, starts captures, runs the pattern generator and reads decoded results from your own application. There's also JavaScript scripting within ScanaStudio for interactive automation.
How does it compare to traditional ATE pattern generators?
SP1000G gives you pattern generation + logic analysis in a compact USB instrument — no rack, no GPIB, no six-figure budget. You trade ATE-grade pin counts for agility: scriptable patterns, fast iteration, and a fraction of the cost.
Need help choosing?
Whether you need guidance on channel count, want to discuss a DFT integration, or just want a quote — we're engineers, not salespeople.
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